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MN103E0600YD
Type Instruction Cache Data Cashe Package Minimum Instruction Execution Time Interrupts Timer Counter
MN103E0600YD (under development) 16 K-byte (4-way, set-associative) 16 K-byte (4-way, set-associative) MLGA239-C-1111 7.5 ns (at 1.8 V tolerance = 5% , 133 MHz) * XIRQ x 8 * NMI * Timer x 14 * DMAC x 4 * WDT * SIO x 6 * I 2C x 2 * Asynchronous bus error 8-bit timer x 4 (all down counters) Cascade connection possible (usable as a 16/24/32-bit timer) Timer output possible (Duty = 1:1) Internal clock source or external clock source selectable Selectable as a serial interface clock 16-bit timer x 7 (down counters) Cascade connection possible (usable as a 32-bit timer) Timer output possible (Duty = 1:1) Internal clock source or external clock source selectable Partially selectable as a serial interface clock 16-bit timer x 1 (up counter) Internal clock source or external clock source selectable Input capture function (rising edge, falling edges, or both selectable) PWM generating function (compare/capture register x 2 contained) Watchdog timer x 1
DMA Contoroller
Number of channels: 4 Transfer unit: 1/2/4/16 byte Maximum number of bytes transferred: 1Mbyte Start factor: External request, interrupt, software Transfer mode: 2-bus cycle transfer Transfer mode: Batch transfer, intermittent transfer Addressing mode: Source/destination each fixed, increment/decrement specification possible Increment/decrement automatically executed according to the transfer unit UART/synchronous (co-used) x 2-ch. UART (with CTS control) x 1-ch.
Serial Interface I/O Pins I/O
19
* Common use : 19
Memory Management Function On-chip Bus Controller
32-entry full-associative TLB loaded (instructions/data separated from each other) Address conversion by paging (page size: 1 K-byte. 4 K-byte, 128 K-byte, 4 M-byte variable) Concurrent access from three types of master devices to four types of slave devices possible
MAF00011BEM
MN103E0600YD
System Bus Interface Memory Bus Interface I2C Interface
External memory space allocation to 8 banks possible SDRAM directly connected interface contained 2 ports Master-slave interface (multi-master supported) 3.3 V interface (open drain output)
Electrical Characteristics
Supply current
Parameter Operating supply current Supply current at stopping
Symbol
Condition
VDD18 = 1.8 V ; VDD33, PVDD = 3.3 V
Limit min
- -
typ
- -
max
460
Unit
IDD18A fOSC = 33.33 MHz (core 133 MHz) ; FRQS[1:0] = 0.0 ; Output open VDD18 = 1.89 V ; VDD33, PVDD = 3.465 V IDD18D fOSC = Stop ; FRQS[1:0] = 0.0 ; Output open ; Tj = 70C
mA
70
mA
(Ta = -20C to +70C)
See the next page for pin assignment and support tool.
MAF00011BEM
Pin Assignment
A 16
ND
B
C
D
E
F
G
H
J
K
SD8
LMN
SD6 SD1 XIRQ7 SD3
P
SD2
R
ND
T
XSCS5 XSCS2 SD31 SD27 SD21 SD17 SD12
15 14 13 12 11 10 09 08 07 06 05 04 03 02
ND
XSCS0 XSCS7 SD28 SD29 SD25 SD19 SD13 SD11 SD4
SD7 XIRQ6 SD0 PIO1[1] PIO1[3] PIO1[0] XRST OUT XRE SET
TCP PIO0[0] XSCS6 XSCS3 XSDK SD26 SD24 SD23 SD15 SD18 SD14 SD9 OUT
PVDD XSWE2 PIO0[1] XSCS4 XSCS1 VDD33 SD22 SD20 SD16 VDD18 SD10 SD5 XIRQ5 PIO1[2] XIRQ4 PVSS XSAS XSWE0 PIO0[2] VSS
VSS SD30 VSS
VSS VDD33 VSS XNMI XIRQ1 XIRQ0 XIRQ2 ND ND ND ND ND ND
OSCI SRXW XSWE3 XSWE1 VDD33 VDD18 VSS VDD33 OSCO SA1 XSRE VDD18 VSS SYS CLK SA2 SA9 SA3 SA5 SA0 SA7 VSS VDD33 SA8 VSS ND ND ND ND ND ND ND VSS ND ND ND ND
VSS XIRQ3 SBT2 SBO2 PIO1[4] SBI2
ND VDD18 PIO1[5] PIO2[7] PIO2[5] PIO2[1] SBI1 ND ND ND VDD33 VSS PIO2[3] PIO1[7] PIO1[6] SBI0 ND VSS TMS PIO2[6] PIO2[4] PIO2[2] TRST TCK PIO2[0] MOD TDO
SA11 SA14 SA4 VDD18 VDD33
ND VDD33 EXTRG
SA12 SA16 SA6 SA10 SA15 VSS
VSS VDD33 VSS VDD18 VDD18 TRCD6 TRCD7 TDI VSS VSS
SA17 SA20 SA13 SA18 SA21 VSS VDD33 XMRAS XMBE1 MD9
VSS TRCD4 TRCD3 TRCD5 TRC CLK
SA19 SA22 SA24 SA26 VDD33 MA8 MA14 MA12 XMWE MD6 VDD33 MD12 VDD33 TRCD2 TRCD1
SA23 SA25 SA27 VSS MA6 MA10 MA9 XMCS1 XMCAS MD8 MD10 MD3 MD1 MD15 TRCST TRCD0 MA3 MA2 MA1 MA7 VDD18 XMCS0 SDCKE MD7 MD5 MD11 MD13 MD0 ND NP MA4 MA5 MA0 MA13 MA11 SDCLK XMBE0 SDCKI MD4 MD2 MD14
01
Perspective
* ND has an electrode (pin) but NC is not guaranteed. Please design so as not to cause short circuit with other wiring on the user board. * The NDs on the four corners are the lands intended for reinforcement. You are required to connect them to the PCB. * NP (No pin.) has no electrode.
MAF00011BEM
MN103E0600YD
Support Tool
ROM Emulator On-board Development Tools
PARTNER-ETII (KMC product) PX-ODB103E-J (On-board debug unit) PX-ODB-AMT-20 (Trace unit) PARTNER-J (KMC product)
MAF00011BEM
Request for your special attention and precautions in using the technical information and semiconductors described in this material
(1) An export permit needs to be obtained from the competent authorities of the Japanese Government if any of the products or technical information described in this material and controlled under the "Foreign Exchange and Foreign Trade Law" is to be exported or taken out of Japan. (2) The technical information described in this material is limited to showing representative characteristics and applied circuits examples of the products. It neither warrants non-infringement of intellectual property right or any other rights owned by our company or a third party, nor grants any license. (3) We are not liable for the infringement of rights owned by a third party arising out of the use of the technical information as described in this material. (4) The products described in this material are intended to be used for standard applications or general electronic equipment (such as office equipment, communications equipment, measuring instruments and household appliances). Consult our sales staff in advance for information on the following applications: * Special applications (such as for airplanes, aerospace, automobiles, traffic control equipment, combustion equipment, life support systems and safety devices) in which exceptional quality and reliability are required, or if the failure or malfunction of the products may directly jeopardize life or harm the human body. * Any applications other than the standard applications intended. (5) The products and product specifications described in this material are subject to change without notice for modification and/or improvement. At the final stage of your design, purchasing, or use of the products, therefore, ask for the most up-to-date Product Standards in advance to make sure that the latest specifications satisfy your requirements. (6) When designing your equipment, comply with the guaranteed values, in particular those of maximum rating, the range of operating power supply voltage, and heat radiation characteristics. Otherwise, we will not be liable for any defect which may arise later in your equipment. Even when the products are used within the guaranteed values, take into the consideration of incidence of break down and failure mode, possible to occur to semiconductor products. Measures on the systems such as redundant design, arresting the spread of fire or preventing glitch are recommended in order to prevent physical injury, fire, social damages, for example, by using the products. (7) When using products for which damp-proof packing is required, observe the conditions (including shelf life and amount of time let standing of unsealed items) agreed upon when specification sheets are individually exchanged. (8) This material may be not reprinted or reproduced whether wholly or partially, without the prior written permission of Matsushita Electric Industrial Co., Ltd.
2003 SEP

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